Shanghai V-Test Semiconductor Tech Co., Ltd. Class A

Shanghai V-Test Semiconductor Tech Co., Ltd. Class A

SSSE:688372
77.41
CNY
-2.99
(-3.72%)
2.08EPS
85.25P/E
31.26BMarket Cap
Oct 28Next Earn
2018 Y
2019 Y
2020 Y
2021 Y
2022 Y
2023 Y
2024 Y
2025 Y
TTM
Revenue per Share
0.55
0.53
2.38
6
6.27
6.49
7.31
10.59
12.45
Basic EPS, GAAP
0.08
0.08
0.52
1.61
2.08
1.04
0.87
2.04
2.18
Free Cash Flow per Basic Share
0.03
-0.06
-1.03
-5.13
-2.59
-6.69
-5.84
-15.07
- -
Dividend per Share
- -
- -
0.03
0.11
0.18
0.92
0.47
0.61
1.31
Book Value per Share
1.04
2.51
7.11
10.57
20.99
21.69
23.01
19.91
25.15
Tangible Book Value per Share
1.03
2.49
7.09
10.45
20.71
21.33
22.66
19.35
24.66
Basic Weighted Avg Shares
80
147
68
82
117
113
147
149
154
Sales/Revenue/Turnover
44
78
161
493
733
737
1,077
1,575
1,913
Operating Margin (%)
26.19
24.18
28.7
34.95
38.51
16.52
15.83
23.26
21.38
Depreciation Expense
7
15
32
86
150
226
334
471
- -
Net Income, GAAP
6
11
35
132
244
118
128
303
335
Effective Tax Rate (%)
- -
6.8
8.17
13.26
0.46
- -
5.84
4.82
4.65
Profit Margin (%)
14.68
14.47
21.62
26.8
33.24
16.02
11.91
19.26
17.52
Working Capital
-22
1
45
-2
1,236
332
255
2
-47
LT Debt
- -
- -
90
257
511
508
1,376
3,152
3,141
Total Equity
83
200
567
899
2,380
2,459
2,619
2,967
4,228
Return on Invested Capital (%)
- -
5.73
6.86
12.1
10.61
- -
3.38
5.41
5.15
Return on Capital (%)
- -
8.82
8.26
13.63
12.08
- -
4.33
6.48
6.23
Return on Common Equity (%)
- -
7.97
9.09
18.04
14.86
4.88
5.05
10.85
9.74

Capital Structure

CNY

•

in mil. unless spec.
Dec'25
Mar'26
Jun'26
ST Debt
778
908
1,045
LT Borrowings
3,138
2,743
3,129
LT Finance Leases
14
11
12
Preferred Equity and Hybrid Capital
- -
- -
- -
Shares Outstanding
149
168
168
Market Capitalization
16,260
21,414
31,264

Working Capital

CNY

•

in mil. unless spec.
Dec'25
Mar'26
Jun'26
Total Current Assets
1,489
1,720
1,893
Cash, Cash Equivalents & STI
413
382
521
Accounts Receivable, Net
527
540
580
Inventories
19
35
32
Total Current Liabilities
1,487
1,683
1,940
Payables & Accruals
- -
- -
- -
ST Debt
778
908
1,045
Deferred Revenue
- -
- -
- -

Growth Rates

CNY

•

in mil. unless spec.

(avg. rate of change)

10 years
5 years
1 year
Total Equity
- -
49.29%
13.3%
Free Cash Flow
- -
160.14%
160.16%
Net Income, GAAP
- -
91.44%
136.45%
Sales/Revenue/Turnover
- -
69.5%
46.22%
Total Cash Common Dividend
- -
186.9%
30.83%

Quarterly Revenue

CNY

•

in mil. unless spec.

Year

Q1
Q2
Q3
Q4
FY
2024
184
246
310
336
1,077
2025
285
349
- -
492
1,575
2026
490
582
- -
- -
- -

Quarterly Earnings Per Share

CNY

•

in mil. unless spec.

Year

Q1
Q2
Q3
Q4
FY
2024
- -
0.08
0.35
0.45
0.87
2025
0.18
0.51
- -
0.68
2.04
2026
0.48
0.53
- -
- -
- -

Quarterly Dividends Per Share

CNY

•

in mil. unless spec.

Year

Q1
Q2
Q3
Q4
FY
2024
0.06
0.3
0.06
0.07
0.47
2025
0.09
0.35
- -
0.09
0.61
2026
0.13
0.69
- -
- -
- -

Company Description

CEO
Wen Sheng Pian
Full Time Employees
2,673
Sector
Electronic technology
Industry
Semiconductors
Address
Shanghai China
IPO Date
Oct 26, 2022
Business
Shanghai V-Test Semiconductor Tech Co., Ltd. is an independent, third-party integrated circuit testing service provider that delivers comprehensive test engineering and mass-production testing solutions across the semiconductor value chain. Founded in 2016 and headquartered in Shanghai, China, the company serves fabless chip design enterprises, integrated device manufacturers, wafer foundries, and packaging and testing houses across computing, automotive electronics, industrial control, telecommunications, and consumer electronics markets. The company's core offerings and services comprise wafer testing (wafer probing) across 6-inch, 8-inch, and 12-inch wafer formats; finished chip testing (final testing) for packaged integrated circuits; system-level testing; burn-in and high-temperature reliability aging testing; testing program development and hardware interface design; automated optical inspection and lead scanning; chip laser marking and tape-and-reel services; semiconductor test equipment leasing; and the provision of specialized test consumables. Its testing engineering capabilities accommodate advanced fabrication processes down to 7nm and 14nm as well as mature nodes above 28nm, supporting complex chip architectures including central processing units, graphics processing units, artificial intelligence accelerators, microcontrollers, field-programmable gate arrays, system-on-chip devices, radio frequency circuits, memory modules, power management integrated circuits, and analog sensors, with specialized platforms for chiplet architectures and automotive-grade standards. In recent corporate developments, Shanghai V-Test Semiconductor Tech Co., Ltd. has undertaken significant capital and capacity expansion initiatives to accelerate growth in high-performance computing, artificial intelligence, and automotive semiconductor testing. The company initiated the issuance of convertible corporate bonds to raise up to approximately 1.2 billion yuan to finance high-end integrated circuit testing base construction projects, optimize debt structure, and supplement operational working capital. Furthermore, the company expanded its domestic footprint by establishing a new subsidiary, Chengdu Weice Semiconductor Technology Co., Ltd., backed by a multi-phase investment plan of up to 1 billion yuan to construct an advanced semiconductor testing facility in southwestern China, while continuing capacity ramp-ups and development plans across its production and engineering bases in Shanghai, Wuxi, Nanjing, Shenzhen, and Tianjin.