QuickLogic Corporation
NASDAQCapital Structure
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in mil. unless spec.Working Capital
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in mil. unless spec.Growth Rates
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in mil. unless spec.Quarterly Revenue
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in mil. unless spec.Quarterly Earnings Per Share
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in mil. unless spec.Quarterly Dividends Per Share
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in mil. unless spec.- CEO
- Brian C. Faith
- Full Time Employees
- 51
- Sector
- Technology
- Industry
- Semiconductors
- Address
- 2220 Lundy Avenue San Jose CA United States of America 95131
- IPO Date
- Oct 18, 1999
- CIK
- 0000882508
- Website
- quicklogic.com
- Similar Companies
- Business
- QuickLogic Corporation (NASDAQ: QUIK), a fabless semiconductor supplier founded in 1988 and headquartered in San Jose, California, designs and sells embedded field programmable gate array (eFPGA) intellectual property, discrete FPGAs, FPGA system-on-chips (SoCs), and associated software tools and professional services; offers radiation-hardened eFPGA IP and ruggedized FPGAs tailored for extreme environments; provides low-power multicore SoCs such as the EOS S3 sensor processing platform with integrated microcontroller, eFPGA, sensor fusion, and voice processing capabilities; licenses customizable eFPGA IP via the Australis IP Generator across process nodes including 12 nm and Intel 18A for integration into ASICs and SoCs; delivers FPGA user tools including open-source Aurora and commercial Aurora Pro with Synopsys Synplify synthesis; develops custom FPGA devices, UCIe-compatible FPGA chiplets in partnership with YorChip, and display interface bridges; and supports markets spanning aerospace and defense, industrial IoT, consumer electronics, edge AI, data centers, and computing with operations facilitated through foundry partners and offices including Taiwan. The company targets original equipment manufacturers, semiconductor firms, and government contractors requiring ultra-low-power, secure, and adaptable solutions optimized for size, weight, power, and cost (SWaP-C). QuickLogic generates revenue through direct IP licenses, product sales, software subscriptions, and engineering services while leveraging an ecosystem of EDA vendors, IP providers, and manufacturing supply chains. Recent developments include securing a $1.4 million incremental funding modification in March 2025 for its Strategic Radiation Hardened (SRH) FPGA program to meet Department of Defense requirements; announcing in January 2025 a strategic review process for its SensiML subsidiary, including potential sale to refocus resources on core eFPGA and ruggedized FPGA growth amid design wins and profitability; awarding a $1 million eFPGA Hard IP contract in October 2025 for a 12 nm high-performance data center ASIC with delivery in Q4 2025; selecting its eFPGA Hard IP by Idaho Scientific in December 2025 for crypto-agile hardware solutions and by Chipus Microelectronics in November 2025 for data center applications; joining the Intel Foundry Chiplet Alliance; appointing Ron Shelton to its board in August 2025; and planning Australis 2.0 IP tool release in Q4 2025 alongside performance enhancements in Aurora Pro tools.
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